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ChipPAC Qualification Results
Assembly Site: ChipPAC, Shanghai (CPS)
Package Style: PDIP
| Product Technology Die Dimensions (mil) Lead Count |
Duration | HIP2106IP
PASIC 2 62 X 88 8 lead |
ICM7555IPA MGFF 48 x 48 8 lead |
CDP68HC68T1E CMOS 126 x 92 16 lead |
HC3-5504B-5 HVTDLM 129 x 100 24 lead |
HI5721BIP HBC10 187 x 153 28 lead |
CDP68HC05-C16
CMOS4 153 x 181 40 lead
|
CDP1802 CCL 161 x 211 40 lead |
| HTOL Ta = 125C |
500 hr 1000 hr |
No Boards
Available |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
- 0 / 74 (a) |
0 / 78 0 / 78 |
0 / 78
0 / 78 |
0 / 78 0 / 78 |
| Temp/Humidity/Bias 85C/85%RH |
500 hr 1000 hr |
-
0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 74 (b) |
0 / 78 0 / 78 |
0 / 77 (C)
0 / 77 |
0 / 78 0 / 78 |
| Pressure Cooker 121C / 100% RH |
96 hr 192 hr |
0 / 78
- |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 | 0 / 78 0 / 78 |
| Temperature Cycle -65C to +150C |
500 cyc 1000 cyc |
-
0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78
0 / 78 |
0 / 78 0 / 78 |
| Temperature Cycle -40C to +125C |
500 cyc 1000 cyc |
-
0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
Not Performed |
0 / 78
0 / 78 |
0 / 78 0 / 78 |
| High Temp Storage Ta = 150C |
1000 hr | 0 / 78 | 0 / 78 | 0 / 78 | 0 / 78 | 0 / 78 | 0 / 78 | 0 / 78 |
| Post Temp Cycle Wire Pull (grams) 1k cycles, -65C to +150C 5 devices, 100% |
Average Std. Dev. Minimum Maximum |
12.8 1.9 9.0 16.9 |
7.9 0.7 6.1 9.2 |
12.1 2.1 7.5 15.8 |
10.8 2.4 0.8 16.1 |
10.2 1.9 5.8 15.5 |
12.9 1.4 9.1 17.1 |
10.9 1.8 6.7 14.3 |
Failure Analysis:
a. Four failures due to EOS. Invalid failure. FA report # VI010103.
b. Four failures due to EOS. Invalid failure.FA report # VI001109.
c. One failure due to fab related metal particle. Invalid failure. FA report # IA000269