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ChipPAC Qualification Results
Assembly Site: ChipPAC, Shanghai (CPS)
Package Style: SOIC
| Product Technology Die Dimensions (mil) Lead Count |
Duration | CA3140M96 BiMOS 62 x 66 8 lead |
ICM7555IBAT MGFF 48 x 48 8 lead |
HIP6012CB-T PASIC 74 x 105 14 lead |
HIP6302 CMOS4AM 75 x 112 16 lead |
HIP6004BCB PASIC-AAB 74 x 105 20 lead |
HIP6019BCB PASIC 107 x 118 28 lead |
HI5703KCB HBC10 183 x 167 28 lead |
| HTOL Ta = 125C |
500 hr 1000 hr |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
No Boards Available |
0 / 77 0 / 77 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
| Temp/Humidity/Bias1 85C/85%RH |
500 hr 1000 hr |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
No Boards Available |
0 / 78 2
|
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
| Pressure Cooker 1 121C / 100% RH |
96 hr 192 hr |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 77
|
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
| Temperature Cycle 1 -65C to +150C |
500 cyc 1000 cyc |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 77 0 / 77 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
| Temperature Cycle 1 -40C to +125C |
500 cyc 1000 cyc |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
Not Performed |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
0 / 78 0 / 78 |
| High Temp Storage Ta = 150C |
1000 hr | 0 / 78 | 0 / 78 | 0 / 78 | 0 / 78 | 0 / 78 | 0 / 78 | 0 / 78 |
| Post Temp Cycle Wire Pull 1k cycles, -65C to +150C 5 devices, 100% (grams) |
Average Std. Dev. Minimum Maximum |
8.1 1.0 6.1 9.9 |
7.1 1.2 5.3 10.1 |
17.2 2.4 12.7 23.4 |
10.4 1.1 7.7 13.0 |
14.6 2.3 1.0 18.4 |
12.1 1.1 8.3 14.9 |
14.2 1.2 10.6 16.5 |
Note: 1. Devices preconditioned to level 1 with 235C reflow per IPC/JEDEC J-STD-020A.
2. 168 hr HAST, 135C/85% RH substituted for THB