C
A general-purpose programming language developed in the 1970s by Dennis Ritchie of
AT&T; Bell Labs. Its generality, machine independence, and efficiency have made C
popular for many application areas. The Unix operating system is written in C and the
close linking of Unix and C have made C the de facto standard language in engineering
software development.
Computer-Aided Design. The use of computer aids (hardware and
software) in the electrical and physical design and verification of new things.
Historically, CAD has been more used to describe the physical design rather than the
electrical design, although currently the distinction is so blurry as to be meaningless.
As applied to Intersil products, this means single-chip and multi-chip electronic
functions. CAD allows Intersil design engineers to design integrated circuits of
continually increasing complexity with decreasing product-to-market times. Of increasing
importance to Intersil is that because of the strength of our CAD capability, we can allow
customers to do their own designs using Intersil's advanced analog and mixed-signal
processes. Analog and mixed-signal design is a much more complex problem than pure digital
design. (Neither is easy.) A strong CAD capability is an essential requirement for the
types of designs produced by Intersil.
Computer-Aided Engineering. Traditionally, CAE has been used to
describe the electrical design rather than the physical design, although these
distinctions have blurred. See CAD.
Computer-Aided Manufacturing. The use of computer aids (hardware
and software) in planning the construction, tracking the construction, analyzing, and
implementing the construction of manufactured things. As applied to Intersil products,
this means primarily the construction of single-chip and multi-chip electronic devices.
CAM provides Intersil manufacturing engineers the control necessary to cost-effectively
build our high-mix product portfolio. Most CAM systems track product flow, equipment
usage, reasons for down time, change requests, rework, and the people involved. Intersil's
systems, in addition, are known for their powerful planning and delivery capabilities. See
IMPReSS.
Critical Dimension. A feature size as in 0.25
micron.
Cadence Design System's version of the popular circuit simulator, SPICE. See SLICE and SPICE.
CERamic Dual-Inline Package. A package assembled with the
leadframe sandwiched between two ceramic layers and sealed by firing a glass frit.
CERamic PACKage. A CERDIP-like package with the leadframe extended out on
two or four sides, typically in surface-mounting format. Characteristics similar to
CERDIP. Also known as CERQUAD (leads on all four sides), CERPAC, or CERPAK.
The region separating the source and drain of a field-effect transistor. The channel is
designed to be normally "on" (conducting) for depletion-mode FETs, or normally
"off" (insulating) for enhancement-mode FETs. With the application of a voltage
to the gate electrode, the conducting properties of the channel are altered, thereby
controlling the current across the channel. The length of the channel is an important
parameter in determining the current of the FET, as well as its speed. See also drain, FET, gate,
and source.
A gate array base die with basic cells arranged in rows or columns. This arrangement
permits routing in the spaces (channels) between rows of gates. Routing efficiency is
usually high, near 90% or more. Routing is generally achieved by placing macros along
single rows or columns. TGC103, TGC105 and TGC108 are examples of a channeled array.
A gate array base die with basic cells covering the entire core with no row or column
spacing. This array is often called a "sea-of-gates" (an LSI Logic, Inc.
trademark) and is more difficult to route. Efficiencies are often 35% or less, due to
complexity of the routing process. The advantage to this architecture is that macros can
be placed in blocks, which increases macro performance. Larger TGC100 family members are
channelless, and smaller members may be redesigned using this architecture.
A characterization node is a characterization parameter which impacts reliability and
is measured during initial process or product characterization and at infrequent
intervals, thereafter. See characterization
parameter, critical node, and performance node.
A characterization parameter is a measurement taken on a process, tool, or product
during a process or product characterization and at infrequent intervals thereafter. See characterization node.
Also called a die. Popular term describing a section of a wafer that contains a
discrete component or an integrated circuit. Many chips are made on a single wafer, then
separated into dice and packaged individually.
A low-profile component package, usually square, whose active chip cavity or mounting
area is a large fraction of the package size, and whose external connections are usually
on all four sides of the package.
The combination of two or more integrated-circuit functions and/or technologies on one
IC to achieve miniaturization, reduce systems cost, and make new applications possible.
Particularly important for signal processing and power control solutions, Intersil has
placed great emphasis on this area.
Computer-Integrated Manufacturing. The integration of computer
control and monitoring into a manufacturing process.
A combination of electrical or electronic components, interconnected to perform one or
more specific functions.
An accurate means of verifying the behavior of a circuit before it is fabricated. Very
accurate models of the circuit devices--such as transistors, resistors, and
capacitors--are used in a simulator that applies efficient numerical analysis algorithms
to solve fundamental circuit analysis equations.
Complex Instruction Set Computer. The Intersil 80C286 CMOS
CPU is a CISC part. Considered the most common CPU architecture of the 1980s. More
flexible and full-featured than RISC. Compare RISC.
A screening process for circuits that are intended for use in ground-based military
electronic systems. Must conform with screening standards per MIL-std 883-C and
MIL-M-38510. Compare Class 'S'.
A screening process for circuits that are intended for use in satellite systems for
military space applications. Must conform with screening standards per MIL-std 883-C and
MIL-M-38510. Compare Class 'B'.
A confined area in which the humidity, temperature, and particulate matter are
precisely controlled within specified units. The "class" of the clean room
defines the maximum number of particles of 0.3 micron size or larger that may exist in one
cubic foot of space anywhere in the designated area. For example, in a Class 1 clean room
only one particle of any kind may exist in one cubic foot of space. Newer clean rooms are
typically Class 1-10, and are needed for manufacturing ICs with feature size close to 1
micron.
A system whose characteristics are proprietary and therefore cannot be readily
connected with other systems. Compare open architecture.
Circuit Limited Yield. See yield.
Complementary Metal-Oxide Semiconductor. A MOS technology
in which both P-channel and N-channel components are fabricated on the same die to provide
integrated circuits that use less power than those made with other MOS (metal oxide
semiconductor) or bipolar processes.
A family of CMOS processes developed in Intersil's Findlay, Ohio facility. These
processes are used to support a wide range of digital applications, including
microprocessors, logic, automotive and semicustom. All of the processes use junction
isolation and local oxidation (LOCOS) to separate individual devices within a circuit.
Their gate length is 3m, 2m and 1.5m respectively.
Chemical-Mechanical Polish (for planarization of wafers). See wafer.
Chip-On-Board. One of many configurations in which a chip is
directly bonded to a circuit board or substrate. These approaches include wire bonding,
TAB, or flip-chip interconnections. See wire bonding, TAB, flip-chip.
One of the three regions that form a bipolar transistor. The base-collector P-N
junction is usually reverse-biased so that minority carriers that are injected into the
base from the emitter are efficiently extracted into the collector. See also base, bipolar transistor and emitter.
See IGBT.
A device that compares two inputs for equality. One type compares voltages and gives
one of two outputs--less than or greater than. Another type compares binary numbers and
has three outputs--less than, equal to, or greater than. A third type compares phase or
frequency and gives an analog output voltage depending on the relationship between the
inputs.
(1) A software tool used to translate higher-level languages (e.g., C, FORTRAN,
COBOL) into machine code, or, (2) A software tool used to translate specifications
of circuit functions (e.g., RAM, ROM, ALU, controller) into schematics and layouts.
A term describing integrated circuits that employ components of both polarity types
connected in such a way that operation of either is complemented. A complementary bipolar
circuit would employ both NPN and PNP transistors, and a complementary MOS circuit (CMOS)
would employ both N-channel and P-channel devices. In general, complementary devices
operate with opposite polarity voltages and currents--advantageous in many circuit
applications.
COMmunications SECurity. In semiconductors, refers to devices (generally
embedded modules) designed into a host communications system to prevent unauthorized
access. Intersil serves this secure communications market with custom and build-to-print
ICs.
A parallel development approach for reducing time-to-market as well as improving the
quality and market impact of new products. Concurrent teams are comprised of
representatives from engineering, manufacturing, marketing, quality, etc., and make a
special effort to involve the ultimate customer during product definition. See also ACT-PTM.
Any material, such as aluminum, copper or gold, that offers little resistance to the
flow of electrical current.
A combination or group of organizations formed to undertake a common objective that is
beyond the resources or capabilities of any single organization. Plural: consortia.
Intersil participates in several industry consortia, specifically SRC, MCC, and SEMATECH.
See SRC, MCC, and SEMATECH.
The presence of unwanted particles, chemicals, or other substances.
The circuitry that performs the control functions of the CPU. It is responsible for
decoding microprogrammed instructions and then generating the internal control signals
that perform the operation requested.
A control parameter is a measurement taken for the purpose of controlling an in-line
process or as a test on product. See critical node.
See A/D converter, D/A
converter and DC-DC converter.
A circuit element that implements convolution, a mathematical process that is the basis
for all filters and fundamental to DSP. Intersil DSP products include two-dimensional
convolvers, which are used to filter images. Filtering suppresses unwanted elements of an
image and accentuates the features that are needed to understand the content of the image.
Common types of two-dimensional filters are low pass, high pass, and edge detection. Low
pass filters reduce noise, high pass filters emphasize the details in an image, and edge
detectors bring out the outlines of objects. This is a new product area for Intersil.
An area of unique strength or expertise. Intersil uses the term to refer to
capabilities, process technologies, or product types that provide the company with a
competitive advantage.
Central Processing Unit. The heart of any computer system.
Basically, the CPU is made up of data registers, computational circuits, the control
block, and I/O (input /output.) See microprocessor and MPU.
A critical node is a control parameter which impacts the reliability of a circuit on a
given technology. See control parameter, characterization node, and performance node.
The flow of electrons or holes. Usually measured in amperes (amp or A) or in fractions
of an ampere (milli-amps or micro-amps). Current can be induced by application of an
electric field through a conductor or by changing the electric field across a capacitor
(displacement current.)
Similar to symbolic layout and compaction, CCS takes as its symbolic beginning the
transistor schematic of the circuit. From there, the layout and compaction are equally
dependent on the quality of the algorithm and the layout rules for the minimization of the
area taken up by the circuit.
An objective measure of performance against customer expectations, as monitored through
formal interviews with specific customers. Used by Intersil to identify problem areas and
correct deficiencies.
An integrated circuit that requires a full set of masks specifically designed for a
particular function or application. A custom IC is usually developed for a specific
customer and may have to withstand harsh environments. Intersil offers a wide range of
process technologies for analog, mixed signal and intelligent power applications. Intersil
has more than 20 years experience in the custom market, specifically targeting
applications requiring analog and radiation-hardening technologies.
Chemical Vapor Deposition. A gaseous process that deposits
insulating films or metal onto a wafer at elevated temperature. Often, reduced pressure is
used to promote the chemical reaction.
The Czochralski or CZ crystal growth technique is the most frequently used method for
producing large single crystals of silicon (also germanium or gallium-arsenide).
In the CZ method a cylindrical single crystal is pulled vertically from silicon melt in
a heated crucible. The growth is initiated by dipping a small seed crystal in the melt,
and after the thermal equilibrium is reached, the crystal is pulled upwards so that it
grows with a constant diameter. At the same time, the crystal rod and the crucible are
rotated in opposite directions. These crystal rods are cut into thin wafers and
processed to be used in integrated circuit (IC) manufacturing. See Gallium Arsenide, integrated
circuit, silicon.
