E
Electron beam. Refers to a machine that produces a stream of electrons
(electron beam) that can be used to expose photo-resists that are sensitive to such beams.
Can be used to expose resists directly on a wafer or on a mask. Electron-beam lithography
is a direct-write microprinting technique.
Enhanced Back-diffused High-Frequency. A Intersil standard
bipolar process technology that is optimized for very high performance with semicustom
tile arrays and semicustom parametric analog cell capabilities. It is available with
either single- or double-level metal interconnects and can be used in either plastic or
hermetic packages.
Emitter-Coupled Logic circuit. ECL circuits use bipolar
transistors biased in the active region. They are a very fast high-power digital
technology commonly used in logic circuits.
Electronic Design Interchange Format. A standardized
exchange language for design information.
Electrically-Erasable Programmable Read-Only Memory.
Similar to PROM, but with the capability of selective erasure of information through
special electrical stimulus. Information stored in EEPROM chips is retained when the power
is turned off. Compare PROM.
Motion of ions of a metal conductor (such as aluminum) in response to the passage of
high current through it. Such motion can lead to the formation of "voids" in the
conductor, which can grow to a size where the conductor is unable to pass current.
Electromigration is aggravated at high temperature and high current density and therefore
is a reliability "wear-out" process. Electromigration is minimized by limiting
current densities and by adding metal impurities such as copper or titanium to the
aluminum.
An elementary atomic particle that carries the smallest negative electric charge
(1.6x10-19 coulombs). Electrons are light in mass, (1/1837 of the mass of the
hydrogen atom), highly mobile, and orbit the nucleus of an atom.
Electrical OverStress is a transient or steady state electrical
condition that exceeds the specifications and/or capabilities of a device. Both the
magnitude and duration of an EOS event can vary. Examples of mild EOS are oxide ruptures
and junction damage with signs of visual stress. Severe EOS may include massive
vaporization of bond wires or aluminum interconnects and carbonizing of plastic packages.
See ESD.
Electron Probe MicroAnalysis.
ElectroStatic Discharge as its name implies is a static buildup of
electrons that is then discharged. The magnitude of ESD can vary widely, but the duration
of a pulse is usually very short. An ESD event can result in junction failure, contact
damage, filamentation, oxide thermal damage, oxide breakdown, charge injection and fusing
(opening) of interconnects. Today there are three types of accepted ESD models: the human
body model, the charge device model, and the machine model. The root cause of ESD
typically is improper handling. This can be augmented by low humidity, ungrounded
equipment and poor device design. See EOS.
One of the three regions that form a bipolar transistor. Under forward bias of the
emitter-base P-N junction, the emitter injects minority carriers (electrons or holes) into
the base region where they either recombine or diffuse into the collector. The flow of
minority carriers from the emitter to the collector is controlled by the base-emitter P-N
junction, thereby giving rise to signal amplification. See also base,
bipolar transistor and collector.
A desktop computer with application software for computer-aided engineering (CAE) or
computer-aided design (CAD) applications, e.g., a Sun workstation with Cadence software
and the Intersil FASTRACK design system. See CAD, CAE, and FASTRACK.
An FET designed so that its channel is fully depleted. It is in the "off"
state with zero voltage applied to the gate. This configuration is attractive for low
quiescent power. See also channel, depletion-mode FET, FET, gate and source.
The controlled growth on a crystalline substrate of a crystalline layer, called an
epilayer. In "homo-epitaxy" (e.g., silicon layers on a silicon substrate) the
epilayer exactly duplicates the properties and crystal structure of the substrate. In
"hetero-epitaxy" (e.g., silicon on sapphire) the deposited epilayer is a
different material with a different crystalline structure than that of the substrate.
Erasable Programmable Read-Only Memory. Similar to
PROM, but allows stored information to be erased. Refers to a non-volatile memory device
whose contents can be erased by exposure to ultraviolet light. See also PROM, EEPROM.
Electrical Rules Check. Software that verifies that a schematic
shows a reasonable connection of circuit elements. Compare DRC.
ElectroStatic Discharge. Discharge of a static charge on a surface
or body through a conductive path to ground. An electronic component may suffer
irreparable damage when it is included in the discharge path.
The process of removing material from a wafer (such as oxides or other thin films) by
chemical, electrolytic or plasma (ion bombardment) means. Examples: nitride etch, oxide
etch.
