Reliability Engineering

This server, (formerly, is finally retiring. It's been a good, long run. The site was created in 1992 with the intention to share information with our customers and improve oversll communication. We hope you found it useful. Much of the same content may now be found on our parent website, You will be redirected there momentarily.

lex_manu.gif (6826 bytes)

Back Up Next

How Semiconductors are Made

The process of manufacturing semiconductors, or integrated circuits (commonly called ICs, or chips) typically consists of more than a hundred steps, during which hundreds of copies of an integrated circuit are formed on a single wafer.

Generally, the process involves the creation of eight to 20 patterned layers on and into the substrate, ultimately forming the complete integrated circuit. This layering process creates electrically active regions in and on the semiconductor wafer surface.

Wafer Production

The first step in semiconductor manufacturing begins with production of a wafer--a thin, round slice of a semiconductor material, usually silicon.

In this process, purified polycrystalline silicon, created from sand, is heated to a molten liquid. A small piece of solid silicon (seed) is placed on the molten liquid, and as the seed is slowly pulled from the melt the liquid cools to form a single crystal ingot. The surface tension between the seed and molten silicon causes a small amount of the liquid to rise with the seed and cool.

The crystal ingot is then ground to a uniform diameter and a diamond saw blade cuts the ingot into thin wafers.

The wafer is processed through a series of machines, where it is ground smooth and chemically polished to a mirror-like luster.

The wafers are then ready to be sent to the wafer fabrication area where they are used as the starting material for manufacturing integrated circuits.

Wafer Fabrication

The heart of semiconductor manufacturing is the wafer fabrication facility where the integrated circuit is formed in and on the wafer. The fabrication process, which takes place in a clean room, involves a series of principle steps described below. Typically it takes from 10 to 30 days to complete the fabrication process.

Thermal Oxidation or Deposition

Wafers are pre-cleaned using high purity, low particle chemicals (important for high-yield products). The silicon wafers are heated and exposed to ultra-pure oxygen in the diffusion furnaces under carefully controlled conditions forming a silicon dioxide film of uniform thickness on the surface of the wafer.


Masking is used to protect one area of the wafer while working on another. This process is referred to as photolithography or photo-masking.

A photoresist or light-sensitive film is applied to the wafer, giving it characteristics similar to a piece of photographic paper. A photo aligner aligns the wafer to a mask and then projects an intense light through the mask and through a series of reducing lenses, exposing the photoresist with the mask pattern.

Precise alignment of the wafer to the mask prior to exposure is critical. Most alignment tools are fully automatic.


The wafer is then "developed" (the exposed photoresist is removed) and baked to harden the remaining photoresist pattern. It is then exposed to a chemical solution or plasma (gas discharge) so that areas not covered by the hardened photoresist are etched away.

The photoresist is removed using additional chemicals or plasma and the wafer is inspected to ensure the image transfer from the mask to the top layer is correct.


Atoms with one less electron than silicon (such as boron), or one more electron than silicon (such as phosphorous), are introduced into the area exposed by the etch process to alter the electrical character of the silicon. These areas are called P-type (boron) or N-type (phosphorous) to reflect their conducting characteristics.

Repeating the Steps

The thermal oxidation, masking, etching and doping steps are repeated several times until the last "front end" layer is completed (all active devices have been formed).

Dielectric Deposition and Metallization

Following completion of the "front end," the individual devices are interconnected using a series of metal depositions and patterning steps of dielectric films (insulators).

Current semiconductor fabrication includes as many as three metal layers separated by dielectric layers.


After the last metal layer is patterned, a final dielectric layer (passivation) is deposited to protect the circuit from damage and contamination. Openings are etched in this film to allow access to the top layer of metal by electrical probes and wire bonds.

Electrical Test

An automatic, computer-driven electrical test system then checks the functionality of each chip on the wafer. Chips that do not pass the test are marked with ink for rejection.


A diamond saw typically slices the wafer into single chips. The inked chips are discarded, and the remaining chips are visually inspected under a microscope before packaging.

The chip is then assembled into a package that provides the contact leads for the chip. A wire-bonding machine then attaches wires, a fraction of the width of a human hair, to the leads of the package. Encapsulated with a plastic coating for protection, the chip is tested again prior to delivery to the customer. Alternatively, the chip is assembled in a ceramic package for certain military applications.

Back Up Next

Contact Us | About Us | Legal | Privacy | Subscribe | Intranet

©2010. All rights reserved.